2012-2018，普度大学，博士

2008-2012，上海交通大学，学士

2021年-至今，上海交通大学，副教授

2018年-2021年，普度大学，博士后

面向先进制程逻辑与存储应用的半导体器件和工艺

2023-2026 国家自然科学基金面上项目

2022-2026 上海市科委基础研究特区计划项目

2022-2025 国家重点研发计划课题

2022-2026 华为合作项目

C. Wang, L. Liao, K. Jiang, Z. Wang, J. Zhao, G. Zhou and M. Si, “On the Accurate Evaluation of Intrinsic Electron Mobility on Oxide Semiconductor Transistors; IEEE Electron Device Lett., vol. 46, no. 11, pp. 2177-2180, 2025.

Z. Lin, L. Kang, Y. Zhang, S. Lu, T. Cui, L. Zheng, J. Zhao, X. Li, X. Zhao, Y. Wu, J. Xu, M. Si, “First Direct Observation of Two Different Hydrogen-Related Processes Corresponding to the Negative VTH Shift under PBTI Stress in IGZO Transistors by Pd Hydrogen Spillover,” in 2025 IEEE Symposium on VLSI Technology (VLSI), 2025.

L. Zheng, Z. Wang, Z. Lin, M. Si, “First Demonstration on the Transient Writing Characteristics of Multi-bit ALD IGZO 2T0C DRAM by Fast I-V Measurement,” in 2024 IEEE International Electron Devices Meeting (IEDM), p. 6-4, 2024.

L. Zheng, Z. Wang, Z. Lin, and M. Si, “The Impact of Parasitic Capacitance on the Memory Characteristics of 2T0C DRAM and New Writing Strategy,” IEEE Electron Device Lett., vol. 44, no.8, pp. 1284-1287, 2023.

W. Tang, Z. Lin, Z. Wang, Z. Lin, L. Feng, Z. Liu, X. Li, P. D. Ye, X. Guo, M. Si, “Monolithic 3D Integration of Vertically Stacked CMOS Devices and Circuits with High-Mobility Atomic-Layer-Deposited In2O3 n-FET and Polycrystalline Si p-FET: Achieving Large Noise Margin and High Voltage Gain of 134 V/V,” in 2022 IEEE International Electron Devices Meeting (IEDM), 2022, pp. 483-486.

M. Si, Z. Lin, Z. Chen, X. Sun, H. Wang, and P. D. Ye, “Scaled indium oxide transistors fabricated using atomic layer deposition,” Nat. Electron., vol. 5, no. 3, pp. 164-170, 2022. 

M. Si, Z. Lin, Z. Chen, and P. D. Ye, “First Demonstration of Atomic-Layer-Deposited BEOL-Compatible In2O3 3D Fin Transistors and Integrated Circuits: High Mobility of 113 cm2/V·s, Maximum Drain Current of 2.5 mA/μm and Maximum Voltage Gain of 38 V/V in In2O3 Inverter; in 2021 IEEE Symposium on VLSI Technology (VLSI), p. T2-4, 2021.

M. Si, Y. Hu, Z. Lin, X. Sun, A. Charnas, D. Zheng, X. Lyu, H. Wang, K. Cho, and P. D. Ye, “Why In2O3 Can Make 0.7 nm Atomic Layer Thin Transistors?,” Nano Lett., vol. 21, no. 1, pp. 500-506, 2021.