博士：加拿大阿尔伯塔大学（University of Alberta），2013-2018

硕士：哈尔滨工业大学，2011-2013

学士：哈尔滨工业大学，2007-2011

长聘教轨副教授：上海交通大学，集成电路学院，2022-至今

博士后：清华大学，集成电路学院，2018-2021

1.     基于先进计算范式的高能效神经网络加速器设计

2.     领域定制与通用高能效近似计算电路设计

3.     面向应用的高能效近似计算电路自动化设计方法

4.     基于超低电压技术的低功耗计算电路设计

1.     主持国家重点研究计划青年科学家项目，面向近似计算的高效神经元计算系统，2022/10/01-2025/09/30.

2.     主持国家自然科学基金面上项目，面向计算密集型应用的新型计算范式及其加速器关键技术，2023/01/01-2027/12/31.

3.     主持国家自然科学基金青年科学基金，基于对数系统的高能效软件定义近似计算芯片关键技术，2022/01/01-2023/12/31.

4.     主持中国博士后科学基金项目，中粒度可重构近似计算芯片设计，2019/01/01-2021-11/30.

5.     参与山东浪潮科学研究院企业委托项目，可重构神经网络近似架构和近似单元设计，2023/04/01-2024/03/31.

主要期刊论文：

1. Xinkuang Geng, Siting Liu, Hui Wang, Leibo Liu, Jie Han, and Honglan Jiang*.  Beyond Uniform Approximation: Toward Efficient Computing in Logarithmic Number System for Large Language Models. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2026.

2. Wenhui Zhang, Xinkuang Geng, Xiaolu Hu, Hui Wang, Jianfei Jiang, Qin Wang, Siting Liu*, Jie Han, and Honglan Jiang*. LUT-ALMs: Trading Off Accuracy and Power for Approximate Logarithmic Multipliers via LUT Optimization. IEEE Transactions on Computers, 2026.

3. Ao Liu, Siting Liu, Hui Wang, Qin Wang, Fabrizio Lombardi, Zhigang Mao, and Honglan Jiang*.  Low-Power Multiplier Designs by Leveraging Correlations of 2×2 Encoded Partial Products. IEEE Transactions on Computers, 74 (11): 3888-3896, 2025.

4. Tingting Zhang, Siting Liu*, Honglan Jiang*, Warren. J. Gross, Fabrizio Lombardi, and Jie Han, Approximate and Stochastic Ising Machines. IEEE Nanotechnology Magazine, 19(4): 44-53, 2025.
   

5. Hai Mo, Yong Wu, Honglan Jiang*, Zining Ma, Fabrizio Lombardi, Jie Han, and Leibo Liu*. Learning the Error Features of Approximate Multipliers for Neural Network Applications. IEEE Transactions on Computers, 73(3), 842-856, 2024.

6. Tong Li, Honglan Jiang*, Hai Mo, Jie Han, Leibo Liu, and Zhigang Mao. Approximate Processing Element Design and Analysis for the Implementation of CNN Accelerators. Journal of Computer Science and Technology, 38(2): 309–327, 2023.

7. Tingting Zhang, Honglan Jiang, Weiqiang Liu, Fabrizio Lombardi, Leibo Liu, Seok-Bum Ko, and Jie Han. A survey of majority logic designs in emerging nanotechnologies for computing. IEEE Transactions on Nanotechnology, Vol. 22, pp. 732-739, 2023.

8. Zijing Niu, Tingting Zhang, Honglan Jiang, Bruce F. Cockburn, Leibo Liu, and Jie Han. Hardware-efficient logarithmic floating-point multipliers for error-tolerant applications. IEEE Transactions on Circuits and Systems I, 1-14, 2023.

9. Francisco Javier Hernandez Santiago, Honglan   Jiang*, Hussam Amrouch, Andreas   Gerstlauer, Leibo Liu and Jie Han*. Characterizing approximate adders and   multipliers for mitigating aging and temperature degradations. IEEE   Transactions on Circuits and Systems I: Regular Papers, 69(11), 4558-4571, 2022.

10. Yong Wu, Honglan Jiang*, Zining Ma, Pengfei Gou, Yong Lu, Jie Han, Shouyi Yin, Shaojun Wei, Leibo Liu*. An Energy-Efficient Approximate Divider Based on Logarithmic Conversion and Piecewise Constant Approximation. IEEE Transactions on Circuits and Systems I, 69(7), 2655-2668, 2022.

11. Honglan Jiang, Shaahin Angizi, Deliang Fan, Jie Han, and Leibo Liu. Non-Volatile Approximate Arithmetic Circuits using Scalable Hybrid Spin-CMOS Majority Gates. IEEE Transactions on Circuits and Systems I, 68(3), 1217-1230, 2021.

12. Honglan Jiang, Shaahin Angizi, Deliang Fan, Jie Han, and Leibo Liu. Non-Volatile Approximate Arithmetic Circuits using Scalable Hybrid Spin-CMOS Majority Gates. IEEE Transactions on Circuits and Systems I, 68(3), 1217-1230, 2021.

13. Honglan Jiang, Francisco J.H. Santiago, Hai Mo, Leibo Liu, and Jie Han. Approximate Arithmetic Circuits: A Survey, Characterization and Recent Applications. Proceedings of the IEEE: 108(12): 2108-2135, 2020.

14. Honglan Jiang, Leibo Liu, Fabrizio Lombardi, and Jie Han. Low-Power Unsigned Divider and Square Root Circuit Designs using Adaptive Approximation. IEEE Transactions on Computers, 68(11): 1635-1646, 2019. (封面)

15. Honglan Jiang, Leibo Liu, Pieter P. Jonker, Duncan G. Elliott, Fabrizio Lombardi, and Jie Han. A high-performance and energy-efficient FIR adaptive filter using approximate distributed arithmetic circuits. IEEE Transactions on Circuits and Systems I, 66(1): 313-326, 2019.

16. Honglan Jiang, Cong Liu, Fabrizio Lombardi, and Jie Han. Low-power approximate unsigned multipliers with configurable error recovery. IEEE Transactions on Circuits and Systems I, 66(1): 189-202, 2019.

17. Siting Liu, Honglan Jiang, Leibo Liu, Jie Han. Gradient descent using stochastic circuits for efficient training of learning machines. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 37(11): 2530-41, 2018.

18. Shaahin Angizi, Honglan Jiang, Ronald F. DeMara, Jie Han, and Deliang Fan. Majority-based spin-CMOS primitives for approximate computing. IEEE Transactions on Nanotechnology, 17(4): 795-806, 2018.

19. Mohammad Saeed Ansari, Honglan Jiang, Bruce F. Cockburn, and Jie Han. Low-power approximate multipliers using encoded partial products and approximate compressors. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 8(3): 404-416, 2018.

20. Honglan Jiang, Cong Liu, Leibo Liu, Fabrizio Lombardi, and Jie Han. A review, classification, and comparative evaluation of approximate arithmetic circuits. ACM Journal on Emerging Technologies in Computing Systems (JETC), 13(4): 60, 2017.

21. Honglan Jiang, Jie Han, Fei Qiao, and Fabrizio Lombardi. Approximate radix-8 booth multipliers for low-power and high-performance operation. IEEE Transactions on Computers, 65(8): 2638–2644, 2016.

主要会议论文：

1. Xinkuang Geng, Siting Liu, Hui Wang, Leibo Liu, Jie Han, and Honglan Jiang*. Adana: Accelerating Large Language Models via Adaptive Nonuniform Asymmetric Quantization. Design Automation Conference (DAC), Long Beach, USA, 2026, pp. 1-7.
   

2. Tongjing Wu, Siting Liu, Tong Li, Hui Wang, Zhigang Mao, Jie Han and Honglan Jiang*. Adaptive Multiply-Accumulate Unit with Scalable Critical Path for Aggressive Voltage Underscaling DNN Accelerators. Design Automation Conference (DAC), San Francisco, USA, 2026, pp. 1-7.

3. Fuxuan Li, Ao Liu, Siting Liu, Hui Wang, Jie Han, and Honglan Jiang*. Bridging the Power Estimation Gap: A GNN-Based Prediction Model for Approximate Logic Synthesis. Design, Automation & Test in Europe (DATE), Verona, Italy, 2026, pp. 1-7.

4. Xinkuang Geng, Siting Liu, Hui Wang, Jie Han, and Honglan Jiang*. SA-ANT: Efficient Low-Bit Group-Wise Quantization for Large Language Models via Sign-Asymmetric Adaptive Numeric Type. Design, Automation & Test in Europe (DATE), Verona, Italy, 2026, pp. 1-7.
   

5. Tongjing Wu, Xiaolu Hu, Tong Li, Siting Liu, Hui Wang, Weifeng He, Zhigang Mao, Honglan Jiang*. EPIC: Error PredIction and Correction for Power-Efficient Voltage Underscaling Multiply-Accumulate Unit. Design Automation Conference (DAC), San Francisco, USA, 2025, pp. 1-7.

6. Xinkuang Geng, Yunjie Lu, Hui Wang, Honglan Jiang*. Segment-Wise Accumulation: Low-Error Logarithmic Domain Computing for Efficient Large Language Model Inference. Design,   Automation & Test in Europe (DATE), France, Lyon, 2025, pp. 1-7.

7. Xinkuang Geng, Siting Liu, Hui Wang, Jie Han, Honglan Jiang*. Lookup Table Refactoring: Towards Efficient Logarithmic Number System Addition for Large   Language Models. Design, Automation & Test in Europe (DATE), France,   Lyon, 2025, pp. 1-7.

8. Xiaolu Hu, Xinkuang Geng, Zhigang Mao, Jie Han, Honglan Jiang*. A   Low-Power Mixed-Precision Integrated Multiply-Accumulate Architecture for   Quantized Deep Neural Networks. Design, Automation & Test in Europe   (DATE), France, Lyon, 2025, pp. 1-7.

9. Xinkuang Geng, Siting Liu, Leibo Liu, Jie Han, and Honglan Jiang*. QUQ:   Quadruplet Uniform Quantization for Efficient Vision Transformer Inference.   Design Automation Conference (DAC), San Francisco, USA, 2024, pp. 1-6.

10. Xiaolu Hu, Ao Liu, Xinkuang Geng, Zizhong Wei, Kai Jiang, and Honglan Jiang*. A   Configurable Approximate Multiplier for CNNs using Partial Product   Speculation. Design, Automation & Test in Europe (DATE), Valencia, Spain, 2024, pp. 1-6.

11. Xinkuang Geng, Siting Liu,   Jianfei Jiang, Kai Jiang, and Honglan Jiang*. Compact Powers-of-Two: An Efficient   Non-Uniform Quantization for Deep Neural Networks. Design, Automation &   Test in Europe (DATE), Valencia, Spain, 2024, pp. 1-6.

12. Weihui Zhang, Xinkuang Geng, Qin Wang, Jie Han, and Honglan Jiang*. A Low-Power and High-Accuracy Approximate Adder for the   Logarithmic Number Systems, Proceedings of the Great Lakes Symposium on   VLSI (GLSVLSI), Clearwater, FL, USA, 2024, pp. 1-7.

13. Zhican Wang, Guang Wang, Honglan   Jiang, Ningyi Xu, and Gguanghui He. COSA: Co-Operative   Systolic Arrays for Multi-Head Attention Mechanism In Neural Network Using Hybrid   Data Reuse And Fusion Methodologies. ACM/IEEE Design Automation Conference   (DAC), San Francisco, CA, USA, 2023, pp. 1-6. (最佳论文提名)

14. Yibo Wu,   Liang Wang, Xiaohang Wang, Jie Han, Jianfeng Zhu, Honglan Jiang,   Shouyi Yin, Shaojun Wei, Leibo Liu. Upward Packet Popup for Deadlock Freedom   in Modular Chiplet-Based Systems. The 28th IEEE International Symposium   on High-Performance Computer Architecture (HPCA-28), Seoul, South Korea,   April 2-6, 2022.

15. Zijing Niu, Honglan Jiang, Saeed Ansari, Bruce   Cockburn, Leibo Liu and Jie Han. A Logarithmic Floating-Point Multiplier for   the Efficient Training of Neural Networks. Proceedings of Great Lakes   Symposium on VLSI, Virtual Conference and Exhibition, 2021, pp. 1-6.

16. Zhixi Yang, Honglan Jiang, Xianbin Li and Jun Yang. Power-Efficient Approximate   Multiplier Using Adaptive Error Compensation. Proceedings of the Great Lakes   Symposium on VLSI, Beijing, China, 2020, pp. 205-210.

17. Honglan Jiang, Francisco JH Santiago, Mohammad Saeed Ansari, Leibo Liu, Bruce F. Cockburn, Fabrizio Lombardi, and Jie Han. Characterizing Approximate Adders and Multipliers Optimized under Different Design Constraints. Proceedings of Great Lakes Symposium on VLSI, Tysons Corner, VA, USA, 2019, pp. 393-398.

18. Honglan Jiang, Leibo Liu, Fabrizio Lombardi and Jie Han. Adaptive Approximation in Arithmetic Circuits: A Low-Power Unsigned Divider Design. Design, Automation & Test in Europe Conference & Exhibition, Dresden, Germany, 2018, pp. 1411-1416.

19. Honglan Jiang, Leibo Liu, and Jie Han. An Efficient Hardware Design for Cerebellar Models using Approximate Circuits, ACM/IEEE Conf. Hardware/Software Co-design and System Synthesis, Seoul, South Korea, 2017.

20. Honglan Jiang, Chengkun Shen, Pieter Jonker, Fabrizio Lombardi, and Jie Han. Adaptive filter design using stochastic circuit. IEEE Computer Society Annual Symposium on VLSI, Pittsburgh, PA, USA, 2016, pp. 122-127.

21. Honglan Jiang, Cong Liu, Naman Maheshwari, Fabrizio Lombardi, and Jie Han. A comparative evaluation of approximate multipliers. IEEE/ACM International Symposium on Nanoscale architectures, Beijing, China, 2016, pp. 191-196. (最佳论文提名)

22. Honglan Jiang, Jie Han, and Fabrizio Lombardi. A comparative review and evaluation of approximate adders. Proceedings of Great Lakes Symposium on VLSI, Pittsburgh, PA, USA, 2015, pp. 343–348.

专著和章节：

1.      Ao Liu, Yong Wu, Qin Wang, Zhigang Mao, Leibo Liu, Jie Han, and Honglan Jiang*, Automated Generation and Evaluation of Application-Oriented   Approximate Arithmetic Circuits, Chapter 14 in Weiqiang Liu, Jie Han, Fabrizio   Lombardi (eds) Design and Applications of Emerging Computer Systems, Springer   Nature, 2024, pp 353-377.

2.      Tingting Zhang, Zijing Niu, Honglan Jiang, Bruce F. Cockburn, Leibo Liu, and Jie Han, Logarithmic Floating-Point Multipliers for Efficient Neural Network   Training. Chapter 21 in Weiqiang Liu, Jie Han, Fabrizio Lombardi (eds) Design and Applications of Emerging Computer   Systems, Springer Cham. 2024, pp 567-586.

3.      Tingting Zhang, Honglan   Jiang, Weiqiang Liu, Fabrizio Lombardi, Leibo Liu, Seok-Bum Ko, and Jie Han, Majority Logic-Based Approximate Multipliers for   Error-Tolerant Applications. Chapter 6 in Weiqiang Liu, Fabrizio Lombardi (eds) Approximate Computing, Springer Cham. 2022, pp 119-146.

4.      Honglan Jiang, Leibo Liu, Fabrizio Lombardi, Jie Han, Approximate Arithmetic Circuits: Design and Evaluation. Chapter 4 in Reda S., Shafique M. (eds) Approximate Circuits: Methodologies and CAD, Springer Cham. 2019, pp 67-98.

1.     本科课程：先进数字系统芯片设计（Advanced System on Chip Design），MST3319，春季学期

2.     研究生课程：先进计算电路与系统（Advanced Computer Arithmetic Circuits and Systems），EST8712，秋季学期